January news update
January news update!
MPW1 silicon & bringup, MPW4 submitted, MPW5 tapeout
00:02:47 |
Fri 01 Apr 2022
December news update
Carlos' twitter space: https://twitter.com/carlosedp/status/1469355189891125255
Silicon compiler: https://www.siliconcompiler.com/
Amaranth: https://github.com/amaranth-lang/amaranth
MPW2 rerun: http…
00:03:52 |
Wed 22 Dec 2021
Interview with Myrtle Shah: MPW3 with Coriolis, Amaranth, Flexcell & PDKMaster
MPW3 App: SoC https://efabless.com/projects/481
SoC source: https://github.com/ChipFlow/caravel_user_project_mpw3.git
Amaranth: https://github.com/amaranth-lang/amaranth
00:20:28 |
Wed 22 Dec 2021
Interview with Staf from Chips4Makers
In this interview we talk about Staf's recent tapeout, the flexcell standard cell generator and pdk master - a kind of API for pdks.
Staf also gives his opinions on the state of the industry and wheth…
00:25:39 |
Mon 29 Nov 2021
November news update
Lots of open source ASIC news from November. Check the youtube description for all the links.
https://youtu.be/goOzeELjjnI
00:04:16 |
Thu 25 Nov 2021
Matt Guthaus - OpenRAM
In this interview with Matt Guthaus, we talk about:
- Recap - what is OpenRAM
- Why do we need a memory compiler like OpenRAM?
- 3 phases of OpenRAM development
- What’s changed since FOSSi dialup
- MPW2 tapeout o…
00:31:56 |
Thu 12 Aug 2021
Tom Spyrou - OpenROAD development, aim, roadmap and integration with OpenLANE
Tom Spyrou is a long time EDA developer who has worked at large and small companies.
- In 1988 Developed QTV at VLSI technology. It was the first STA engine to be trusted to sign off devices for fabri…
00:24:42 |
Mon 02 Aug 2021
Dirk Koch & Nguyen Dao - Fabulous embedded FPGAs
One of the popular types of entries to MPW1 & 2 have been FPGAs. I have previously spoken with Arya Reais-Parsi about their FPGA project submitted to MPW1.
In MPW2 I noticed there were a couple of ap…
00:39:09 |
Fri 23 Jul 2021
Will Green: learning FPGAs with graphics and project F
Will Green: learning FPGAs with graphics and project F
01:49:40 |
Thu 10 Jun 2021
Dan Rodrigues - first shuttle, racing the beam & retro gaming
00:00 Introducing Dan Rodrigues 01:15 Dan was on the first shuttle 02:30 Converting an FPGA project to an ASIC 03:17 How long it took to prepare his submission? 05:17 What kind of config changes wer…
00:31:14 |
Wed 05 May 2021
Thomas Parry - Amateur satellite radio, Open Source vs Industry tools, beautiful analogue layout
00:00 Introducing Thomas Parry 00:36 Project is an amateur satellite transceiver 01:02 Thomas wanted a challenging project 01:17 His background 01:50 Working for SystematIC Design in Delft doing anal…
00:34:16 |
Tue 23 Mar 2021
Sylvain "tnt" Munaut - testing USB peripherals on the Google/Skywater/Efabless ASIC shuttle
00:20:14 |
Fri 12 Mar 2021
Vladimir Milovanović - putting a spectrometer on the Google/Skywater/Efabless ASIC shuttle
00:14:37 |
Fri 12 Mar 2021
Arya Reais-Parsi - an FPGA for the Google/Skywater/Efabless ASIC shuttle
In this interview Arya Reais-Parsi talks about: 00:45? FPGA design is for a course 01:50? difference between other open FPGA fabrics 02:50? FPGAs as accelerators 04:27? their FPGA structure 06:30? h…
00:28:10 |
Fri 12 Mar 2021
Diego Hernando - analog circuits on the Google/Skywater/Efabless ASIC shuttle
00:29:49 |
Fri 12 Mar 2021
Lakshmi S - Designing a PLL for the Google/Skywater/Efabless ASIC shuttle
00:00? introduction01:04? worked under Kunal Ghosh as an intern: https://www.vlsisystemdesign.com/basi...? 02:18? Questions from Niklas - time it takes, what's frustrating, fun? 05:40? Are the tools…
00:24:31 |
Fri 12 Mar 2021
Anton Blanchard - Microwatt: a 64 bit OpenPOWER core, VHDL and OpenLANE.
https://github.com/antonblanchard/microwatt-caravel
01:00:27 |
Thu 11 Mar 2021
Tim Edwards - what happens between ASIC submission and sending to Skywater?
00:12 Tim Edwards introduction 01:00 next steps after submission before files sent to Skywater 02:00 infrastructure - getting all the latest from everyone's repositories 03:05 size of the repos can b…
00:30:13 |
Thu 11 Mar 2021
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